Mark Aagaard: Research

Digital-system designers rely upon a hierarchy of abstractions that allow them to treat complex collections of transistors as single modules. These abstractions range from switch-level models, to Boolean algebra, to the register-transfer level. An increasingly urgent challenge is to find an abstraction above the register-transfer level that is effective in improving design and validation techniques.

Today, digital-system design proceeds primarily by evolution and validation is done almost entirely by simulation. A deeper understanding of the structure and behavior at the microarchitectural level will make design and validation more systematic and productive. My focus is pipelining, a pervasive and complex microarchitectural optimization. A solid mathematical foundation for pipelined circuits will provide system designers and tool developers with a coherent set of rules that will both open up new regions of the design space for exploration and prevent straying into unsound regions.

Current research is supported by: Intel, SRC, CFI, OIT, NSERC.

Possible Research Projects

I'm looking for students at all levels who are interested in challenging and exciting research projects and theses. Below, I've listed a variety of potential projects and theses at different levels, many other topics are also possible.

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