Note: Many of these conference articles were revised and subsequently published in journals.

• M. Cenk, M. A. Hasan, and C. Negre, “Improved Three-Way Split Formulas for Binary Polynomial Multiplication", Springer LNCS, Proceedings of Selected Areas in Cryptology, Toronto, Aug, 2011.

• N. Meloni, C. Negre and M. A. Hasan, ”High Performance GHASH Function for Long Messages,” pp. 154-167, Springer LNCS 6123, Proceedings of ACNS’10, Beijing, June 2010.

• A. H. Namin and G. Li and J. Wu and J. Xu and Y. Huang and O. Nam and R. Elbaz and M. A. Hasan, “FPGA Implementation of CubeHash, Gróstel, JH, and SHAvite-3 Hash Functions,” pp. 121-124, 8th IEEE International NEWCAS Conference, Montreal, June 2010.

• A. H. Namin and M. A. Hasan, ”Implementation of the Compression Function for Selected SHA-3 Candidates on FPGA,” 4 double column pages, 17th Reconfigurable Architecture Workshop, Atlanta, GA, April 2010.

• N. Méloni and M. A. Hasan, “Elliptic Curve Point Scalar Multiplication Combining Yao's Algorithm and Double Bases,” pp. 304-316, LNCS 5747 (Springer), Proceedings of CHES, Lausanne, Switzerland, September 2009.

• M. A. Hasan and C. Negre, “Subquadratic Space Complexity Multiplier for a Class of Binary Fields using Toepliz Matrix Approach,” pp. 67-75, Proc. of 19th IEEE Symp. Comp. Arith., Portland, OR, June 2009.

• M. A. Hasan and C. Negre, "Subquadratic Space Complexity Multiplication over Binary Fields with Dickson Polynomial Representation," pp. 88-102, LNCS 5130 (Springer), Proceedings of WAIFI, Siena, Italy, July 6-9, 2008.

• S. Bayat-Saramdi and M. A. Hasan, "Detecting errors in a polynomial basis multiplier using multiple parity bits for both inputs," pp. 368-375, Proc. of 25th IEEE International Conference on Computer Design, Lake Tahoe, CA, 2007.

• M. A. Hasan, “On matrix-vector vector product based sub-quadratic arithmetic complexity schemes for field multiplication,” 669702:1-11 (11 pages), Proc. of SPIE Advanced Signal Processing Algorithms, Architectures, and Implementations XVII, San Diego, CA, August 2007.

• S. Bayat-Saramdi and M. A. Hasan, “Run-time error detection of polynomial basis multiplication using linear codes,” pp. 204-209, Proc. of 18th IEEE International Conf. on Application-Specific Systems, Architectures and Processors (ASAP), Montreal, 2007.

• J. Chung and M. A. Hasan, “Asymmetric squaring formulae,” pp. 113-122, Proc. of Arith18, Montpellier, France, June 2007.

• J. Chung and M. A. Hasan, “Montgomery reduction algorithm for modular multiplication using low-weight polynomial form integers,” pp. 230-239, Proc. of Arith18, Montpellier, France, June 2007.

• S. Bayat-Sarmadi and M. A. Hasan, "Concurrent Error Detection of Polynomial Basis Multiplication over Extension Fields using a Multiple-bit Parity Scheme," pp. 102-110, Proc. of Defect and Fault Tolerance (DFT) in VLSI Systems Symposium, Monterey, California, USA, 2005.

• J. Lutz and M. A. Hasan, "High Performance FPGA Based Elliptic Curve Cryptographic Co-Processor," pages 486-492, Volume II, proceedings of International Conference on Information Technology (ITCC) 2004.

• A. Daneshbeh and M. A. Hasan, "Area Efficient High Speed Elliptic Curve Crypto-processor for Random Curves," pages 588-593, Volume II, proceedings of International Conference on Information Technology (ITCC) 2004.

• M. A. Hasan "Side Channel Information Leakage-- Insecurity of Security Systems," pp. 16-18, Proc., International Conference on Computer and Information Technology, Dhaka, Bangladesh, December 2003. (invited)

• A. Reyhani-Masoleh and M. A. Hasan, "On Low Complexity Bit Parallel Polynomial Basis Multipliers," pp. 189-202, LNCS 2779 (Springer), Proc., Cryptographic Hardware and Embedded Systems Workshop, Cologne, Germany, September 2003.

• J. Lutz and M. A. Hasan, "High Performance Finite Field Multiplier for Cryptographic Applications," to appear in Proc. of SPIE's 48th Annual Meeting, San Diego, CA, August 2003. (invited)

• N. Ebeid and M. A. Hasan, "On Randomizing Private Keys to Counteract DPA Attacks," 15 proceedings pages, to appear in LNCS (Springer), Proc. of SAC'03, Ottawa, ON, August 2003.

• J. Chung and M. A. Hasan, "More Generalized Mersenne Numbers," LNCS (Springer), Proc., of SAC'03, Ottawa ON, August 2003.

• A. Daneshbeh and M. A. Hasan, "A Unidirectional Bit Systolic Architecture for Double-Basis Division over GF(2^m), pp. 174-180, Proc. of Arith16, Santiago de Compostela, Spain, June 2003.

• A. Reyhani-Masoleh and M. A. Hasan, "Low Complexity Sequential Normal Basis Multipliers over GF(2^m)," pp. 188-195, Proc. of Arith16, Santiago de Compostela, Spain, June 2003.

• A. Reyhani-Masoleh and M. A. Hasan, "Error Detection in Polynomial Basis Multipliers over Binary Extension Fields," pp. 516-529, LNCS 2523 (Springer), Proc., Cryptographic Hardware and Embedded Systems Workshop, San Francisco, CA, August 2002.

• A. Reyhani-Masoleh and M. A. Hasan, "New Digit-Serial Normal Basis Multipliers over GF(2^m)," pp. 781-784, Proc. ISCAS, AZ, June, 2002.

• A. Reyhani-Masoleh and M. A. Hasan, "Fast Normal Basis Multiplication Using General Purpose Processor", pp. 247-261, LNCS (Springer), Proc., Selected Areas in Cryptography, August 2001.

• M. A. Hasan, "Efficient Computation of Multiplicative Inverses in Large Finite Fields", pp. 66-72, Proc., 15th IEEE Symp. on Computer Arithmetic, June 2001.

• A. Reyhani-Masoleh and M. A. Hasan, "On Efficient Normal Basis Multiplication", pp. 213-224, LNCS 1977 (Springer), Proceedings of Indocrypt 2000.

• M. A. Hasan, "Power Analysis Attacks And Algorithmic Approaches To Their Countermeasures For Koblitz Curve Cryptosystems", pp. 93-108, LNCS 1965 (Springer), Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems, Worcester, MA, August 17-18, 2000.

• M. Elgebaly and M. A. Hasan, "Elliptic Curve Diffie-Hellman Key Exchange Coprocessor", pp. 54-58, Proceedings of the 20th Biennial Symposium on Communications, Kingston, Ontario, May 2000.

• A. Reyhani-Masoleh and M. A. Hasan, "A Reduced Redundancy Massey-Omura Parallel Multiplier over GF(2^m)", pp. 59-63, Proceedings of the 20th Biennial Symposium on Communications, Kingston, Ontario, May 2000.

• A. Reyhani-Masoleh and M. A. Hasan, "A New Efficient Architecture of Mastrovito Multiplier over GF(2^m)", pp. 308-312, Proceedings of the 20th Biennial Symposium on Communications, Kingston, Ontario, May 2000.

• M. A. Hasan, "Look-up Table Based Large Finite Field Multiplication in Memory Constrained Cryptosystems," pp. 213-221, Proceedings of the 7th IMA Conference on Cryptography and Coding, December 20-22, Cirencester, UK, LNCS 1746, Springer Verlag, 1999.

• A. G. Wassal and M. A. Hasan, "Traffic Driven Low-Power Design of VLSI Packet Switching Fabrics", pp. 78-89, Proceedings of the Canadian Conference on Broadband Research, Ottawa, November 7-9, 1999.

• H. Wu and M. A. Hasan and I. F. Blake, "Highly Regular Architectures for Finite Field Computation Using Redundant Basis", pp. 269-279, Proceedings of CHES'99, LNCS, Springer Verlag, 12-13 August 1999.

• A. G. Wassal and M. A. Hasan, "A VLSI Architecture for ATM Switches with Algorithm-Agile Encryption Capability", pp. 325-328, Proceedings of the 9th IEEE Great Lakes Symposium on VLSI, March 4-6, 1999.

• A. Wassal and M. A. Hasan, "A VLSI Switch Architecture for Broadband Satellite Networks", pp. 42-25, IEEE Midwest Symposium on Circuits and Systems, University of Notre Dame, Notre Dame, 1998.

• H. Wu and M. A. Hasan and I. F. Blake, "Efficient Computation of Multiple Points for Elliptic Curve Crypto-systems", p. 49, IEEE International Symposium on Information Theory, 1998.

• A. E. Hussein, M. A. Hasan and M. I. Elmasry, "A Low Power Algorithm for Division in Residue Number Systems", pp. 205-208, Proceedings of the Canadian Conf. on Elect. and Comp. Eng., Waterloo, ON, May 1998.

• A. Wassal and M. A. Hasan, "Design of High Performance Pipeline Transversal Filter for Fading Channel Equalizer", pp. 213-215, Proceedings of the Canadian Conf. on Elect. and Comp. Eng., Waterloo, ON, May 1998.

• A. Wassal, M. A. Hasan and M. I. Elmasry, "Low Power Design of Finite Field Multipliers for Wireless Applications", pp. 19-25, 8th Great Lakes Symposium on VLSI, Lafayette, LA, February 1998.

• H. Wu and M. A. Hasan, "Efficient Implementation of a Class of Clock Controlled Sequence Generators", pp. 511-514, Proceedings of the IEEE Pacific Rim Conference, Victoria, BC, August, 1997.

• H. Wu and M. A. Hasan and I. F. Blake, "Low Complexity Bit-Parallel Finite Field Multipliers", pp. 109-112, Proceedings of the 5th Canadian Workshop on Information Theory, Toronto, ON, June 1997.

• E. Farag, M. A. Hasan and M. I. Elmasry, "Low Power Radix 2 Division Algorithm with Minimum Add/Sub Operations", pp. 39-50, SPIE Vol. 2846, Denver, CO, August 1996.

• H. Wu and M. A. Hasan, "Efficient Exponentiation using Dual Basis", pp. 204-207, Proceedings of the 18th Biennial Symposium on Communications, Kingston, ON, June 1996.

• M. Pichora and M. A. Hasan, "VLSI Implementation of Inversion in GF(2^m)", pp. 163-166, Proceedings of the 18th Biennial Symposium on Communications, Kingston, ON, June 1996.

• M. A. Hasan, "Shift-Register Synthesis for Multiplicative Inversion Over GF(2^m)", summary, p. 49, Proceedings of the IEEE International Symposium on Information Theory, Whistler, BC, Sept. 1995.

• M. A. Hasan, "Double-Basis Inversion in GF(2^m)", pp. 229-232, Proceedings of the Canadian Conf. on Elect. and Comp. Eng., Montreal, PQ, Sept. 1995.

• M. A. Hasan, "Division-and-Accumulation in GF(2^m)", pp. 233-236, Proceedings of the Canadian Conf. on Elect. and Comp. Eng., Montreal, PQ, Sept. 1995.

• M. A. Hasan, "A VLSI Architecture for a Fast SIPO Multiplier for GF(2^m)", summary, p. 47, Proceedings of the 2nd International Winter Meeting on Coding and Information Theory, Essen, Germany, Dec., 1993 (invited).

• M. A. Hasan and V. K. Bhargava, "An Architecture for a Universal Reed-Solomon Encoder using a Triangular Basis Multiplication Algorithm", pp. 255-258, Proceedings of the Canadian Conference on Electrical and Computer Engineering, Vancouver, BC, Sept., 1993.

• M. A. Hasan and V. K. Bhargava, "Inverterless Cauchy Cells for Systolic Reed-Solomon Encoder", p. 97, Proceedings of the IEEE International Symposium on Information Theory, San Antonio, TX, Jan., 1993.

• M. A. Hasan and V. K. Bhargava, "A VLSI Architecture for a Low Complexity Rate-Adaptive Reed-Solomon Encoder", pp. 331-334, Proceedings of the 16th Biennial Symposium on Communications, Kingston, ON, May 1992.

• J. C. Lee, M. A. Hasan and V. K. Bhargava, "Data Aided Cancellation of Narrowband Interference in Data Transmission Systems", pp. 299-303, Proceedings of the COMCONEL, Cairo, Egypt, 1991.

• M. A. Hasan, J. C. Lee and V. K. Bhargava, "Performance of a Narrowband Interference Canceller with an Adjustable Center Weight", pp. 669-672, Proceedings of the IEEE Pacific Rim Conference, Victoria, BC, 1991.

• Q. -H. Meng, M. A. Hasan, W.-S. Lu and V.K. Bhargava, "On the Minimization of System Matrix for Two Dimensional Digital Filter", pp. 396-399, Proceedings of the IEEE Pacific Rim Conference, Victoria, BC, 1991.

• M. A. Hasan and V. K. Bhargava, "Multiplication and Inversion over a Class of GF(2^m)", pp. 211-214, Proceedings of the IEEE Pacific Rim Conference, Victoria, BC, 1991.

• M. A. Hasan and V. K. Bhargava, "Division and Bit-Serial Multiplication over GF(q^m)", summary, p. 290, Proceedings of the IEEE International Symposium on Information Theory, Budapest, Hungary, 1991.

• M. A. Hasan and V. K. Bhargava, "Performance Analysis of a Centralized Data Collecting Two Hop Packet Radio Network", pp. 330-334, Proceedings of the ICCS, Singapore, 1990.