My vision is to achieve broad impact by exploring the domains of (1) post-silicon
technology with a holistic view from device-level to system-level, and
(2) novel technology-stimulated interdisciplinary research and innovation.
Specific focus areas include device and circuit interactive design and optimization for
energy efficient and error resilient systems, future generations of
electronic applications enabled by emerging technologies such as
non-volatile memories, low-dimensional-material-based nanoelectronics and
wide-bandgap semiconductor devices, cryogenic CMOS device modeling and circuit design for quantum computing, and design of low-power sensing and
monitoring applications enabled by miniaturized mechatronics.
Error-resilient Computation with Imperfect Emerging Technologies
Due to the slowing of technology scaling and architectures with
separate microprocessors and memories, energy efficiency has become one of
the major challenges for the conventional digital computing in the big data
era. New computing schemes, such as neuromorphic computing and approximate
computing, offer great opportunities for applications where energy
consumption is a main concern. Such applications range from mobile platforms to server
farms.
Various novel materials and devices have been proposed
as potential candidates to replace or complement silicon in the post-Moore
era. These emerging technologies -- both logic and memory -- have
shown superior performance and unique properties than the traditional
silicon technology.
However, material quality and fabrication
processes for these devices are currently suffer from low device/
circuit yields due to imperfections. This means
there is still much to be done before these emerging technologies are ready for
scale use in conventional systems.
The only alternative is to develop error-resilient computing applications. To that end,
starting with low-dimensional-materials (e.g. carbon nanotube, graphene,
black phosphorous) based logic devices and emerging non-volatile memories
(e.g. RRAM, MRAM), we will explore the impact of technology imperfection
across the boundaries of device, circuit and system levels. We will also
develop systematic methodology to improve circuit-level yield through
device-circuit interactive design and optimization. We are actively
exploring areas such as optimization framework which links material
imperfection and variation with system-level yield for technology
evaluation and projection, systematic design methodology for technology
with process imperfection ready to be integrated into mainstream electronic
design automation (EDA), and error-resilient circuit prototype with yield
enhancement design.
Cryogenic CMOS Circuit for Quantum Computing
Quantum computing (QC) has come a long way in device, architecture and algorithm domains. Recent advancement in fault-tolerant QC with technologies such as surface code, together with the technological progress in physical demonstration of silicon-based high-fidelity multiple quantum bits (qubits) has been a big step towards the dream of a complex quantum computer with potentially millions of qubits. The integration and/or interaction between classical CMOS and QC platforms is an emerging field of excitement.
Such application requires, at least in the near future, to operate CMOS at cryogenic temperatures (as low as millie Kevin) far below the conventional range of operating temperature (usually above -40C or -55C). In this direction, compact models for cryo-CMOS will be developed and calibrated deep sub-micron CMOS models at such temperature with electrical, thermal and noise behaviors. Scalable fault-tolerant QC architectures will be thoroughly considered to implement the error correction codes with a large number of qubits. Separate layers with CMOS modules, for functions such as controlling qubit operations, data readout and communication, will be designed and integrated in a compact and scalable way, to accommodate large numbers of qubits as well as stringent thermal budget.
GaN Technology for Millimeter-wave Communication
Wireless communication systems are on the cusp of
fifth-generation (5G) technology. This will enable anyone to access information
anywhere, at any time, between any device and their applications in the era
of “Internet of Things”. 5G technology poses demanding performance
requirements in semiconductor device and RF circuits in terms of power,
efficiency, linearity, advanced circuit topologies and system
architectures, as the mobile network operators will require operation at
relatively high powers and mm-wave frequencies while demanding a reduction
in the circuit size.
This results in a compounded set of challenges. Shrinking the device while increasing operational
frequency results in significant internal electro-magnetic coupling,
detrimental to device performance, and increased output power results in
higher energy dissipation increasing the temperature. The device physics,
electro-magnetic fields and distributed temperatures co-couple and limit
the overall efficiency
Due to its competitive material properties, emerging GaN technologies
promise high-power and high-frequency power amplifiers. We are
currently investigating GaN via electro-thermal characterization,
simulation and modeling to incorporate the multi-physics couplings that
occur within mm-wave power transistors. We will then be able to control and
manipulate these couplings through unique transistor layouts. The creation
of new multi-physics based modeling methodologies will also allow circuit
and system performance optimization through the study of the impacts of
device parameter modifications
Self-powered Wireless Sensor Networks for Electricity Grid Monitoring
The growing concern over enhancing the energy consumption efficiency within
residential and commercial buildings has led to the recent research efforts
in the development of intelligent power management systems. Achieving the
targeted environmental and economic objectives requires an automated and
intelligent infrastructure capable of monitoring the energy usage by
individual appliances within a building.
Wireless Sensor Networks (WSNs)
have received an increased attention due to their promising approach in
forming an intelligent power management system. We are currently developing
WSNs consisting of low-powered, non-invasive and cost-effective intelligent
sensor nodes that are capable of gathering, analyzing, and transmitting the
sensory information to a central hub for post-processing purposes. The
power required for the sensor nodes’ operation is harvested from the
ambient energy in the environment eliminates the need for batteries and
therefore prolongs the life and durability of sensor nodes.
Collaboration and Available Equipment
Members of the Wei’s Group believe in interdisciplinary research and
collaboration. In particular, our lab has some state-of-the-art research
equipment, some of which are unique in Canada/Ontario. Please feel free to
contact me if interested.
Research
My vision is to achieve broad impact by exploring the domains of (1) post-silicon technology with a holistic view from device-level to system-level, and (2) novel technology-stimulated interdisciplinary research and innovation.
Specific focus areas include device and circuit interactive design and optimization for energy efficient and error resilient systems, future generations of electronic applications enabled by emerging technologies such as non-volatile memories, low-dimensional-material-based nanoelectronics and wide-bandgap semiconductor devices, cryogenic CMOS device modeling and circuit design for quantum computing, and design of low-power sensing and monitoring applications enabled by miniaturized mechatronics.
Error-resilient Computation with Imperfect Emerging Technologies
Due to the slowing of technology scaling and architectures with separate microprocessors and memories, energy efficiency has become one of the major challenges for the conventional digital computing in the big data era. New computing schemes, such as neuromorphic computing and approximate computing, offer great opportunities for applications where energy consumption is a main concern. Such applications range from mobile platforms to server farms.
Various novel materials and devices have been proposed as potential candidates to replace or complement silicon in the post-Moore era. These emerging technologies -- both logic and memory -- have shown superior performance and unique properties than the traditional silicon technology.
However, material quality and fabrication processes for these devices are currently suffer from low device/ circuit yields due to imperfections. This means there is still much to be done before these emerging technologies are ready for scale use in conventional systems.
The only alternative is to develop error-resilient computing applications. To that end, starting with low-dimensional-materials (e.g. carbon nanotube, graphene, black phosphorous) based logic devices and emerging non-volatile memories (e.g. RRAM, MRAM), we will explore the impact of technology imperfection across the boundaries of device, circuit and system levels. We will also develop systematic methodology to improve circuit-level yield through device-circuit interactive design and optimization. We are actively exploring areas such as optimization framework which links material imperfection and variation with system-level yield for technology evaluation and projection, systematic design methodology for technology with process imperfection ready to be integrated into mainstream electronic design automation (EDA), and error-resilient circuit prototype with yield enhancement design.
Cryogenic CMOS Circuit for Quantum Computing
Quantum computing (QC) has come a long way in device, architecture and algorithm domains. Recent advancement in fault-tolerant QC with technologies such as surface code, together with the technological progress in physical demonstration of silicon-based high-fidelity multiple quantum bits (qubits) has been a big step towards the dream of a complex quantum computer with potentially millions of qubits. The integration and/or interaction between classical CMOS and QC platforms is an emerging field of excitement.
Such application requires, at least in the near future, to operate CMOS at cryogenic temperatures (as low as millie Kevin) far below the conventional range of operating temperature (usually above -40C or -55C). In this direction, compact models for cryo-CMOS will be developed and calibrated deep sub-micron CMOS models at such temperature with electrical, thermal and noise behaviors. Scalable fault-tolerant QC architectures will be thoroughly considered to implement the error correction codes with a large number of qubits. Separate layers with CMOS modules, for functions such as controlling qubit operations, data readout and communication, will be designed and integrated in a compact and scalable way, to accommodate large numbers of qubits as well as stringent thermal budget.
GaN Technology for Millimeter-wave Communication
Wireless communication systems are on the cusp of fifth-generation (5G) technology. This will enable anyone to access information anywhere, at any time, between any device and their applications in the era of “Internet of Things”. 5G technology poses demanding performance requirements in semiconductor device and RF circuits in terms of power, efficiency, linearity, advanced circuit topologies and system architectures, as the mobile network operators will require operation at relatively high powers and mm-wave frequencies while demanding a reduction in the circuit size.
This results in a compounded set of challenges. Shrinking the device while increasing operational frequency results in significant internal electro-magnetic coupling, detrimental to device performance, and increased output power results in higher energy dissipation increasing the temperature. The device physics, electro-magnetic fields and distributed temperatures co-couple and limit the overall efficiencyDue to its competitive material properties, emerging GaN technologies promise high-power and high-frequency power amplifiers. We are currently investigating GaN via electro-thermal characterization, simulation and modeling to incorporate the multi-physics couplings that occur within mm-wave power transistors. We will then be able to control and manipulate these couplings through unique transistor layouts. The creation of new multi-physics based modeling methodologies will also allow circuit and system performance optimization through the study of the impacts of device parameter modifications
Self-powered Wireless Sensor Networks for Electricity Grid Monitoring
The growing concern over enhancing the energy consumption efficiency within residential and commercial buildings has led to the recent research efforts in the development of intelligent power management systems. Achieving the targeted environmental and economic objectives requires an automated and intelligent infrastructure capable of monitoring the energy usage by individual appliances within a building.
Wireless Sensor Networks (WSNs) have received an increased attention due to their promising approach in forming an intelligent power management system. We are currently developing WSNs consisting of low-powered, non-invasive and cost-effective intelligent sensor nodes that are capable of gathering, analyzing, and transmitting the sensory information to a central hub for post-processing purposes. The power required for the sensor nodes’ operation is harvested from the ambient energy in the environment eliminates the need for batteries and therefore prolongs the life and durability of sensor nodes.
Collaboration and Available Equipment
Members of the Wei’s Group believe in interdisciplinary research and collaboration. In particular, our lab has some state-of-the-art research equipment, some of which are unique in Canada/Ontario. Please feel free to contact me if interested.
Postdoc and graduate student positions available. Please contact me if you are interested.