Lan received her B. S. in Microelectronics and Economics from Peking University, Beijing, China in 2005 and M. S. and Ph. D. in Electrical Engineering from Stanford University, Stanford, USA (with Prof. H. –S. Philip Wong) in 2007 and 2010, respectively.
Before joining UWaterloo in 2014, Lan worked at Altera Corporation (now part of Intel Corporation) in San Jose, California, where her responsibilities included foundry technology evaluation, power management and Stratix X FPGA product development with Intel 14nm technology. Lan also worked as a post-doctoral associate in Microsystems Technology Laboratories, Massachusetts Institute of Technology under Prof. Dimitri Antoniadis.
Lan's research focuses on device-circuit interactive design and optimization, integrated nanoelectronic systems with imperfect technologies (e.g. low-dimensional materials based transistors and non-volatile memories with imperfect materials, process and reliability failures), GaN-based technology for milliemeter wave communication, and self-powered grid sensing and monitoring systems. For more information regarding her research activities, please see the webpage of Waterloo Emerging Integrated Systems Group (WEIS)
Lan has served on the Technical Program Committee of IEDM (2011-2012), ISLPED (2013), VSLI-TSA (2013- ), GLSVLSI (2017- ), S3S (2018- ) and was listed as one of the key contributors to the PIDS (Process Integration, Devices, and Structures) Chapter of ITRS (International Technology Roadmap for Semiconductors) 2009 Edition. She is the co-developer of the MIT Virtual Source GaN HEMT (MVSG) Compact Model, which is an Industry Standard approved and supported by the Compact Model Coalition for GaN HEMT compact model.
Outside of work, Lan enjoys family time with her husband and son. She is enthusiastic about exploring different cultures, places, and food, through traveling and reading. She also likes theater and music.
Lan Wei’s 1-page curriculum vitae can be downloaded here.
Postdoc and graduate student positions available. Please contact me if you are interested.
Biography
Before joining UWaterloo in 2014, Lan worked at Altera Corporation (now part of Intel Corporation) in San Jose, California, where her responsibilities included foundry technology evaluation, power management and Stratix X FPGA product development with Intel 14nm technology. Lan also worked as a post-doctoral associate in Microsystems Technology Laboratories, Massachusetts Institute of Technology under Prof. Dimitri Antoniadis.
Lan's research focuses on device-circuit interactive design and optimization, integrated nanoelectronic systems with imperfect technologies (e.g. low-dimensional materials based transistors and non-volatile memories with imperfect materials, process and reliability failures), GaN-based technology for milliemeter wave communication, and self-powered grid sensing and monitoring systems. For more information regarding her research activities, please see the webpage of Waterloo Emerging Integrated Systems Group (WEIS)
Lan has served on the Technical Program Committee of IEDM (2011-2012), ISLPED (2013), VSLI-TSA (2013- ), GLSVLSI (2017- ), S3S (2018- ) and was listed as one of the key contributors to the PIDS (Process Integration, Devices, and Structures) Chapter of ITRS (International Technology Roadmap for Semiconductors) 2009 Edition. She is the co-developer of the MIT Virtual Source GaN HEMT (MVSG) Compact Model, which is an Industry Standard approved and supported by the Compact Model Coalition for GaN HEMT compact model.
Outside of work, Lan enjoys family time with her husband and son. She is enthusiastic about exploring different cultures, places, and food, through traveling and reading. She also likes theater and music.
Lan Wei’s 1-page curriculum vitae can be downloaded here.Postdoc and graduate student positions available. Please contact me if you are interested.
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